| 摘要 |
An elevator electronic safety system in which reliability of malfunction check can be improved by performing a malfunction check on memory data, an address bus, and a data bus. A check on the address bus and the data bus is executed periodically by a hardware circuit and software processing, and a memory data malfunction check circuit. A designated address and designated data used to verify both cases of “0” and “1” for each of all bit signals on the address bus and the data bus in a memory system are input to or output (the address is only output) from a CPU periodically. For the address bus, plural designated addresses are detected by a designated address detection circuit. For the data bus, plural pieces of designated data are written into and read out from memories and the data before and after writing are compared with each other. |
