发明名称 TIMING ANALYSIS METHOD, PROGRAM AND SYSTEM
摘要 <P>PROBLEM TO BE SOLVED: To perform the timing analysis of a semiconductor integrated circuit under the consideration of the influence of an IR drop. <P>SOLUTION: This timing analysis method includes: a step (A) of calculating a delay voltage function showing a relation between a delay fluctuation coefficient and voltage fluctuation; a step (B) of calculating a voltage distance function showing a relation between the voltage fluctuation and a distance by an IR drop; a step (C) of calculating the delay distance function showing a relation between the delay fluctuation coefficient and the distance by the IR drop by combining the delay voltage function with the voltage distance function; a step (D) of correcting an OCV coefficient depending on the distance by using the delay distance function; and a step (E) of executing the timing analysis of an object circuit by using the corrected OCV coefficient. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012053651(A) 申请公布日期 2012.03.15
申请号 JP20100195399 申请日期 2010.09.01
申请人 RENESAS ELECTRONICS CORP 发明人 KOBAYASHI SUSUMU
分类号 G06F17/50;G01R31/28;H01L21/82 主分类号 G06F17/50
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