发明名称 |
METHOD OF PRODUCING MULTI-LAYER STRUCTURES |
摘要 |
<p>A method of producing metal-insulator-semiconductor structures, wherein an insulating layer is etched using a conductor layer formed on a selected area of the insulating layer as a mask, and a peripheral edge projection of the conductor layer caused by side etching of the side portion of the insulating layer during the etching step is completely converted into an insulator, whereby the destruction of the gate of the structure is prevented.</p> |
申请公布号 |
CA1032659(A) |
申请公布日期 |
1978.06.06 |
申请号 |
CA19730184345 |
申请日期 |
1973.10.26 |
申请人 |
HITACHI, LTD. |
发明人 |
ANZAI, NORIO;TOMOZAWA, AKIHIRO;TSUNEMATSU, MASAYASU;MATSUI, YASUSHI |
分类号 |
H01L29/78;H01L21/00;H01L21/306;H01L21/32;H01L21/3205;H01L21/336;H01L23/52;H01L29/00;(IPC1-7):01L29/78 |
主分类号 |
H01L29/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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