Conditional memory fault assist suppression

摘要

In some disclosed embodiments instruction execution logic provides conditional memory fault assist suppression. Some embodiments of processors comprise a decode stage to decode one or more instruction specifying: a set of memory operations, one or more register, and one or more memory address. One or more execution units, responsive to the one or more decoded instruction, generate said one or more memory address for the set of memory operations. Instruction execution logic records one or more fault suppress bits to indicate whether one or more portion of the set of memory operations are masked. Fault generation logic is suppressed from considering a memory fault corresponding to a faulting one of the set of memory operations when said faulting one of the set of memory operations corresponds to a portion of the set of memory operations that is indicated as masked by said one or more fault suppress bits.

主权项

1. A processor comprising:
a decode stage to decode a single-instruction-multiple-data (SIMD) instruction specifying: a set of memory load operations, a destination register, and one or more memory address; and one or more execution units, responsive to the decoded SIMD instruction, to:
generate said one or more memory address for the set of load operations;record one or more fault suppress bits to indicate whether one or more portion of the set of load operations are masked;suppress a fault generation logic from considering a memory fault corresponding to one or more of the set of load operations whenever said one or more of the set of load operations corresponds to a portion of the set of load operations indicated as masked by said one or more fault suppress bits, wherein the fault generation logic comprises a fault assist logic to:
cause a mask corresponding to the set of memory load operations to be checked during a retirement stage, responsive to a detection of a fault condition during an execution stage of the set of memory load operations when said one or more fault suppress bits indicate that one or more of the set of memory load operations are not masked.