| 发明名称 | Mechanism to provide workload and configuration-aware deterministic performance for microprocessors | ||
| 摘要 | One embodiment of an apparatus includes a semiconductor chip having a processor and an on-die non-volatile storage resource. The on-die non-volatile storage may store different, appropriate performance related information for different configurations and usage cases of the processor for a same performance state of the processor. | ||
| 申请公布号 | US9417681(B2) | 申请公布日期 | 2016.08.16 |
| 申请号 | US201514697541 | 申请日期 | 2015.04.27 |
| 申请人 | Intel Corporation | 发明人 | Varma Ankush;Sistla Krishnakanth V.;Rowland Martin T.;Poirier Chris;Dehaemer Eric J.;Ananthakrishnan Avinash N.;Shrall Jeremy J.;Man Xiuting C.;Gunther Stephen H.;Rangan Krishna K.;Bodas Devadatta V.;Soltis Don;Nguyen Hang T.;Woo Cyprian W.;Dang Thi |
| 分类号 | G06F15/177;G06F1/32;G06F1/00;G06F1/20 | 主分类号 | G06F15/177 |
| 代理机构 | Nicholson De Vos Webster & Elliott, LLP | 代理人 | Nicholson De Vos Webster & Elliott, LLP |
| 主权项 | 1. An apparatus comprising: a semiconductor chip having a processor and on-die non-volatile storage, said on-die non-volatile storage to store different, performance related information for different configurations and expected usage cases of said processor for a same performance state of said processor, and circuitry to detect at least one of a configuration change and an expected usage change to the processor and provide an operating performance level to the processor from the different, performance related information. | ||
| 地址 | Santa Clara CA US | ||