发明名称 A/D CONVERSION METHOD AND CAMERA SYSTEM
摘要 <P>PROBLEM TO BE SOLVED: To provide an A/D conversion circuit, a solid state image sensor, and a camera system which can allow for the counter to count with both edges of a clock and to switch between an up-count and a down-count while retaining the values and which can keep the duty of count operation firm even if it is a both-edge count. <P>SOLUTION: An ADC 15A is configured as an integration type A/D conversion circuit using a comparator 151 and an asynchronous counter 152. The counter 152 has a function of switching its count mode from an up-count to a down-count or from the down-count to the up-count while retaining the values, a function of counting with the frequency twice as much as an input clock which counts by both edges of an input clock CK starting up and shutting down, and a function of latching the input clock CK asynchronously by an asynchronous signal of the output of the comparator 151 and making the normally rotated or inverted data of the latched data the data of LSB. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012023779(A) 申请公布日期 2012.02.02
申请号 JP20110232069 申请日期 2011.10.21
申请人 SONY CORP 发明人 HISAMATSU YASUAKI
分类号 H03M1/56;H04N5/3745 主分类号 H03M1/56
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