发明名称 |
SEMICONDUCTOR MEMORY DEVICE HAVING VERTICAL TRANSISTOR AND BURIED BIT LINE AND METHOD FOR FABRICATING THE SAME |
摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device with a simple fabrication process, in which an ohmic contact is formed between a drain region of a vertical transistor and a buried bit line, and a method for fabricating the same. <P>SOLUTION: A semiconductor memory device includes: an active region protruding upward from a substrate by a trench formed on the substrate; a first impurity region formed at an upper portion of the active region; a second impurity region formed at a lower portion of the active region; a gate dielectric layer formed along a side of the active region between the first impurity region and the second impurity region; a gate electrode layer formed on the gate dielectric layer; and a buried bit line consisting of a metal layer disposed apart from the second impurity region by a liner layer below the trench and a polysilicon layer disposed so as to directly contact the second impurity region over the metal layer. <P>COPYRIGHT: (C)2012,JPO&INPIT |
申请公布号 |
JP2012019200(A) |
申请公布日期 |
2012.01.26 |
申请号 |
JP20110101790 |
申请日期 |
2011.04.28 |
申请人 |
HYNIX SEMICONDUCTOR INC |
发明人 |
KIM BEK-MAN;KIM JUN-GI;UN YONG SEOK;NOH KYONG-BONG |
分类号 |
H01L21/8242;H01L21/768;H01L27/108;H01L29/417 |
主分类号 |
H01L21/8242 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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