发明名称 Memory device with dynamic controllable physical logical mapping table loading
摘要 An apparatus includes a processor and a memory that includes computer program code. The memory and the computer program code are configured to, with the processor, cause the apparatus at least to send information from a host device to a mass storage memory device that is connected with the host device, the information including an indication of at least one default logical address range for a mass memory of the mass storage memory device. The memory and the computer program code are further configured, with the processor, to cause the apparatus, during operation of the host device with the mass storage memory device, and in response to at least one trigger condition being satisfied, to initiate a load of a portion of a logical-physical address conversion table that is stored in a memory of the mass storage memory device to another memory of the mass storage memory device as a local logical-physical address conversion table, where the portion corresponds to the at least one default logical address range. Also disclosed are corresponding methods and computer-readable storage medium, as well as a mass memory device or module that operates and is constructed in accordance with the exemplary embodiments of this invention.
申请公布号 US2012011299(A1) 申请公布日期 2012.01.12
申请号 US20100803899 申请日期 2010.07.09
申请人 MYLLY KIMMO J.;NOKIA CORPORATION 发明人 MYLLY KIMMO J.
分类号 G06F12/02;G06F12/00 主分类号 G06F12/02
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