| 摘要 |
<p>The present invention relates to a SONOS non-volatile memory device and a method for fabricating the same. In order to solve problems with smaller SONOS non-volatile memory devices in the art, such as, a decrease in the amount of charge being trapped in a charge trapping layer which results in difficulty in securing a memory window margin for recognizing a program condition of the memory device and a program erase condition, a nano pattern such as a concavo-convex pattern is formed on a joined surface between the charge trapping layer and a blocking insulation film, among other areas of the charge trapping layer, on which charges are mainly trapped. The present invention adds only a nano-pattern-forming process to the conventional SONOS process, without involving a separate additional complicated process, so as to expand the interface between the charge trapping layer and the blocking insulation film, which corresponds to an area where charges are trapped among other areas of the charge trapping layer. As such, it is possible to increase a charge trapping area per unit length, and a sufficiently large memory window margin can thus be ensured even in an ultra-small memory device not larger than 45 nm, thereby providing non-volatile memory devices having higher reliability.</p> |
