发明名称 AWARE MANUFACTURING OF AN INTEGRATED CIRCUIT
摘要 Some embodiments of the invention provide a process for designing and manufacturing an integrated circuit (“IC”). The process selects a wiring configuration and an illumination configuration. The process uses the selected wiring configuration to design an IC layout. The process then uses the selected illumination configuration to manufacture the IC based on the designed IC layout. Some embodiments concurrently select an optimal pair of wiring and illumination configurations. Other embodiments select an illumination configuration based on the selected wiring configuration. Yet other embodiments select a wiring configuration based on the selected illumination configuration. In some embodiments, selecting the illumination configuration entails selecting at least one stepper lens for the IC layout, where the stepper lens illuminates at least one mask for at least one particular layer of the IC layout. In some embodiments, this selection entails selecting a stepper lens for each particular layer of the IC layout. Also, in some embodiments, selecting the wiring configuration entails defining the width and/or spacing of the routes along different directions on at least one particular wiring layer of the IC layout. In some embodiments, this selection entails selecting width and/or spacing of routes along different directions on each particular layer of the IC layout.
申请公布号 US2011314436(A1) 申请公布日期 2011.12.22
申请号 US201113220678 申请日期 2011.08.29
申请人 FUJIMURA AKIRA;SCHEFFER LOUIS K. 发明人 FUJIMURA AKIRA;SCHEFFER LOUIS K.
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项
地址