发明名称 |
LOGIC-BASED eDRAM USING LOCAL INTERCONNECTS TO REDUCE IMPACT OF EXTENSION CONTACT PARASITICS |
摘要 |
An electronic device includes an active layer located over a substrate with the active layer having a logic circuit and an eDRAM cell. The electronic device also includes a first metallization level located over the active layer that provides logic interconnects and metal capacitor plates. The logic interconnects are connected to the logic circuit and the metal capacitor plates are connected to the eDRAM cell. The electronic device additionally includes a second metallization level located over the first metallization level that provides an interconnect connected to at least one of the logic interconnects, and a bit line that is connected to the eDRAM cell. A method of manufacturing an electronic device is also included. |
申请公布号 |
US2011298026(A1) |
申请公布日期 |
2011.12.08 |
申请号 |
US201113046973 |
申请日期 |
2011.03.14 |
申请人 |
JANSEN JOHN G.;KAO CHI-YI;CHEN CE;MOINIAN SHAHRIAR;LSI CORPORATION |
发明人 |
JANSEN JOHN G.;KAO CHI-YI;CHEN CE;MOINIAN SHAHRIAR |
分类号 |
H01L27/108;H01L21/28 |
主分类号 |
H01L27/108 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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