发明名称 Coupling well structure for improving HVMOS performance
摘要 A semiconductor structure includes a substrate, a first well region of a first conductivity type overlying the substrate, a second well region of a second conductivity type opposite the first conductivity type overlying the substrate, a cushion region between and adjoining the first and the second well regions, an insulation region in a portion of the first well region and extending from a top surface of the first well region into the first well region, a gate dielectric extending from over the first well region to over the second well region, wherein the gate dielectric has a portion over the insulation region, and a gate electrode on the gate dielectric.
申请公布号 US8049295(B2) 申请公布日期 2011.11.01
申请号 US20100887300 申请日期 2010.09.21
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 CHOU HSUEH-LIANG;WU CHEN-BAU;CHU WENG-CHU;HUANG TSUNG-YI;FAN FU-JIER
分类号 H01L29/02 主分类号 H01L29/02
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