发明名称 |
DECOUPLING CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT |
摘要 |
A decoupling circuit includes an inverter. The inverter includes i (i is an integer of 1 or more) PMOS transistors each having a first gate electrode, and j (j is an integer of 0 or more) PMOS transistors each having a second gate electrode. The inverter includes m (m is an integer of 1 or more) NMOS transistors each having a third gate electrode, and n (n is an integer of 0 or more) NMOS transistors each having a fourth gate electrode. The first to fourth gate electrodes are coupled to an input end of the inverter. A total area of the first and second gate electrodes is different from a total area of the third and fourth gate electrodes.
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申请公布号 |
US2011260784(A1) |
申请公布日期 |
2011.10.27 |
申请号 |
US201113089253 |
申请日期 |
2011.04.18 |
申请人 |
RENESAS ELECTRONICS CORPORATION |
发明人 |
EIMITSU MASATOMO;SAEKI TAKANORI |
分类号 |
G05F3/02 |
主分类号 |
G05F3/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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