发明名称 Bit set modes for a resistive sense memory cell array
摘要 Various embodiments of the present invention are generally directed to a method and apparatus for providing different bit set modes for a resistive sense memory (RSM) array, such as a spin-torque transfer random access memory (STRAM) or resistive random access memory (RRAM) array. In accordance with some embodiments, a group of RSM cells in a non-volatile semiconductor memory array is identified for application of a bit set operation. A bit set value is selected from a plurality of bit set values each separately writable to the RSM cells to place said cells in a selected resistive state. The selected bit set value is thereafter written to at least a portion of the RSM cells in the identified group.
申请公布号 US8040713(B2) 申请公布日期 2011.10.18
申请号 US20090352693 申请日期 2009.01.13
申请人 SEAGATE TECHNOLOGY LLC 发明人 CHEN YIRAN;REED DANIEL S.;LU YONG;LIU HARRY HONGYUE;LI HAI;BOWMAN ROD V.
分类号 G11C11/00 主分类号 G11C11/00
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