发明名称 Methods for forming planarized hermetic barrier layers and structures formed thereby
摘要 Methods and associated structures of forming a microelectronic structure are described. Those methods may comprise forming a conductive material in an interconnect opening within an interlayer dielectric material that is disposed on a substrate, forming a low density dielectric material on a surface of the dielectric layer and on a surface of the conductive material, and forming a high density dielectric barrier layer on the low density dielectric layer.
申请公布号 US8039920(B1) 申请公布日期 2011.10.18
申请号 US20100948410 申请日期 2010.11.17
申请人 INTEL CORPORATION 发明人 KING SEAN W.;YOO HUI JAE
分类号 H01L21/00 主分类号 H01L21/00
代理机构 代理人
主权项
地址