发明名称 ROUTER DESIGN FOR 3D NETWORK-ON-CHIP
摘要 A network-on-chip router which includes an input buffer, an input controller connected to said input buffer, an arbiter connected to said input controller, a crossbar connected to said arbiter and said input buffer, and an output buffer connected to said crossbar. The network-on-chip router minimizes propagation time of data through the router by ensuring that the propagation delay of data through an input buffer is less than the combined propagation delay of data through an input controller and arbiter.
申请公布号 US2011243147(A1) 申请公布日期 2011.10.06
申请号 US20100751811 申请日期 2010.03.31
申请人 TOSHIBA AMERICA RESEARCH, INC. 发明人 PAUL BIPUL C.
分类号 H04L12/56 主分类号 H04L12/56
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