| 摘要 |
A method of patterning a dielectric layer with a Zep 520 positive EB photoresist as a mask, comprising the steps of depositing an α-Si film on the dielectric layer; providing a layer of Zep 520 positive EB photoresist having high-resolution patterns therein by electron beam direct writing; etching the α-Si film by chlorine-based plasma with the layer of Zep 520 positive EB photoresist as a mask, so as to transfer the high-resolution patterns of the Zep 520 positive EB photoresist to the underlying α-Si film; removing the Zep 520 positive EB photoresist; etching the dielectric layer by fluorine-based plasma with the α-Si film having high-fidelity patterns as a hard mask, so as to provide patterns of recesses; and removing the α-Si film by wet etching or dry etching. The inventive method is completely compatible with and easily incorporated into the conventional CMOS processes, with high reliability and resolution for providing nanoscale fine patterns of recesses. It solves the above-mentioned problem in the fabrication of novel structure of CMOS device.
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