发明名称 BIT LINE STABILITY DETECTION
摘要 A power supply and monitoring apparatus such as in a nonvolatile memory system. A power supply circuit provides power to a large number of sense modules, each of which is associated with a bit line and a string of non-volatile storage elements. During a sensing operation, such as a read or verify operation, a discharge period is set in which a sense node of each sense module discharges into the associated bit line and string of non-volatile storage elements, when the string of non-volatile storage elements, is conductive. This discharge sinks current from the power supply, causing a perturbation. By sampling the power supply, a steady state condition can be detected from a rate of change. The steady state condition signals that the discharge period can be concluded and data can be latched from the sense node. The discharge period automatically adapts to different memory devices and environmental conditions
申请公布号 US2011188314(A1) 申请公布日期 2011.08.04
申请号 US20100697003 申请日期 2010.01.29
申请人 KUO TIEN-CHIEN;MUI MAN L 发明人 KUO TIEN-CHIEN;MUI MAN L.
分类号 G11C16/06;G11C5/14;G11C7/10 主分类号 G11C16/06
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