发明名称 MULTILAYER WIRING BOARD
摘要 <P>PROBLEM TO BE SOLVED: To contribute to improvement in wiring density by reducing the area of lands, and making the reduced area available as the wiring region. <P>SOLUTION: A multilayer wiring board 10 has such a structure as vias 13 and 17 are formed on the wiring layer 11 as an inner layer from the directions facing both sides thereof, and each of the lands L1, L2 and L3 defined at points of the wiring layer 11 connected respectively with the vias is formed to have a tapered side surface. In this structure, the lands include first lands L1 and L2 where the via 13 is connected to the surface on the small diameter side, and a second land L3 where the via 17 is connected only to the surface on the large diameter side. The surface of the second land L3 on the large diameter side has the same dimension as that of the surface of the first lands L1 and L2 on the small diameter side. <P>COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011134957(A) 申请公布日期 2011.07.07
申请号 JP20090294435 申请日期 2009.12.25
申请人 SHINKO ELECTRIC IND CO LTD 发明人 YAMADA TOMOKO
分类号 H05K3/46;H01L23/12 主分类号 H05K3/46
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