发明名称 |
Recycling long multi-operand instructions |
摘要 |
A pipelined microprocessor configured for long operand instructions is disclosed. The microprocessor includes a memory unit and a load-store unit. The load store unit is coupled to the memory unit and includes a data formatter receiving information from the memory unit and including an operand selector and a shift register portion. The microprocessor also includes an execution unit coupled to the load-store unit and receiving operand information there from. The execution unit includes output latches coupled to a storage location within the execution unit for storing output information from the execution unit. |
申请公布号 |
US7962726(B2) |
申请公布日期 |
2011.06.14 |
申请号 |
US20080051215 |
申请日期 |
2008.03.19 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
MALLEY EDWARD T.;ALEXANDER KHARY J.;BUSABA FADI Y.;KAPADIA VIMAL M.;PLATE JEFFREY S.;RELL, JR. JOHN G.;SHUM CHUNG-LUNG KEVIN |
分类号 |
G06F9/00;G06F9/44 |
主分类号 |
G06F9/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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