| 摘要 |
A mapping apparatus maps, on a semiconductor integrated circuit, a circuit function described in a circuit description, the semiconductor integrated circuit having a plurality of reconfigurable cores arranged separately from one another and having a logic reconfiguration function. A first group of register circuits are formed between at least two reconfigurable cores included in the plurality of reconfigurable cores and temporarily hold an output from one of the reconfigurable cores and transferring the output to another one of the reconfigurable cores. The mapping apparatus includes a divider that divides the circuit function into a plurality of circuit function blocks, an eliminator that eliminates a register from between the plurality of circuit function blocks and a synthesis executer that executes logic synthesis on each of the plurality of circuit function blocks from between which the register has been eliminated. A placing and routing unit places and routes, on each of the reconfigurable cores, each of the plurality of circuit function blocks on which the logic synthesis has been executed.
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