发明名称 CIRCUIT FOR THE PARALLEL SUPPLYING OF POWER DURING TESTING OF A PLURALITY OF ELECTRONIC DEVICES INTEGRATED ON A SEMICONDUCTOR WAFER
摘要 <p>A circuit architecture provides for the parallel supplying of power during electric or electromagnetic testing of electronic devices integrated on a same semiconductor wafer and bounded by scribe lines. The circuit architecture comprises a conductive grid interconnecting the electronic devices and having a portion external to the devices and a portion internal to the devices. The external portion extends along the scribe lines; and the internal portion extends within at least a part of the devices. The circuit architecture includes interconnection pads between the external portion and the internal portion of the conductive grid and provided on at least a part of the devices, the interconnection pads forming, along with the internal and external portions, power supply lines which are common to different electronic devices of the group.</p>
申请公布号 EP2324499(A1) 申请公布日期 2011.05.25
申请号 EP20090777658 申请日期 2009.08.05
申请人 STMICROELECTRONICS SRL 发明人 PAGANI, ALBERTO
分类号 H01L23/58;G01R31/28 主分类号 H01L23/58
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