Integrated circuit with electrostatically coupled MOS transistors, and method for producing the same

摘要

The circuit (100) has an electrically conductive portion (117) placed between a gate (113a) of a lower MOS transistor (101a) and a channel region (109b) of an upper MOS transistor (101b). A dielectric layer (103) is placed between the conductive portion and the channel region. A section of the channel region is located in a plane parallel to main surfaces (106b, 108b) of a semi-conductor layer (104b) and included in a section of the conductive portion. The channel region of the upper transistor is placed between the conductive portion and a gate (113b) of the upper transistor. An independent claim is also included for a method for forming an integrated circuit.