发明名称 Circuits with transient isolation operable in a low power state
摘要 An integrated circuit includes a core-logic providing a core-logic output, a latch in communication with the core-logic to store a state of the core-logic output, and an isolation circuit for selectively interconnecting the core-logic output to an input of the latch. The circuit also includes and a power consumption controller in communication with the core-logic, the latch and the isolation circuit, for controlling the latch to store a state of the core-logic output, and output a corresponding signal. The controller is further operable to signal the isolation circuit to isolate the core-logic output from the latch by providing an output corresponding to predetermined value and transition the core-logic from a high power state and a low power state. This prevents transient signals from propagating to interconnected circuit blocks and external devices.
申请公布号 US7904838(B2) 申请公布日期 2011.03.08
申请号 US20070839245 申请日期 2007.08.15
申请人 ATI TECHNOLOGIES ULC 发明人 BALATSOS ARIS;LEUNG CHARLES;VOLETI SIVA RAGHU RAM
分类号 G06F17/50;G06F9/45 主分类号 G06F17/50
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