发明名称 THERMAL DUAL GATE OXIDE DEVICE INTEGRATION
摘要 A method is provided that includes providing a semiconductor substrate including at least a thin gate oxide pFET device region and a thick gate oxide pFET device region and forming a thin gate oxide pFET within the thin gate oxide pFET device region and a thick gate oxide pFET within the thick gate oxide pFET device region. The thin gate oxide pFET that is formed includes a layer of SiGe on an upper surface of the thin gate oxide pFET device region, a high k gate dielectric located on an upper surface of the layer of SiGe, a pFET threshold voltage adjusting layer located on an upper surface of the high k gate dielectric, and a gate conductor material atop the pFET threshold voltage adjusting layer. The thick gate oxide pFET that is formed includes a thermal oxide located on an upper surface of the thick gate oxide pFET device region, a silicon layer located on an upper surface of the thermal oxide and a gate conductor material located atop the silicon layer.
申请公布号 US2011042751(A1) 申请公布日期 2011.02.24
申请号 US20090542768 申请日期 2009.08.18
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 KIM BYEONG Y.;CHUDZIK MICHAEL P.
分类号 H01L27/092;H01L21/28 主分类号 H01L27/092
代理机构 代理人
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