发明名称 Method and apparatus for reducing charge trapping in high-k dielectric material
摘要 In one embodiment, an integrated circuit includes a memory array having a plurality of capacitors for storing data of an initial state in the memory array in an initial state. The integrated circuit also includes circuitry for occasionally inverting the data stored by the plurality of capacitors and tracking whether the current state of the data stored by the plurality of capacitors corresponds to the initial state. The circuitry inverts the data read out of the memory array during a read operation when the current state of the data does not correspond to the initial state.
申请公布号 US7894240(B2) 申请公布日期 2011.02.22
申请号 US20080201223 申请日期 2008.08.29
申请人 QIMONDA AG 发明人 BECK MICHAEL;KERBER MARTIN;LAHNOR PETER;THEWES ROLAND
分类号 G11C11/24 主分类号 G11C11/24
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