发明名称 Variable Verzögerungsschaltung, Speichersteuerungsschaltung, Vorrichtung zur Einstellung der Verzögerungsdauer, Verfahren zur Einstellung der Verzögerungsdauer und Programm zur Einstellung der Verzögerungsdauer
摘要 <p>A variable delay circuit (100) able to change a delay amount from when a signal (IN) is inputted to when the signal is outputted has a first delay section (101) delaying the signal (IN) by a first delay amount, a second delay section (102) delaying the signal (IN) by a second delay amount greater than the first delay amount, and a delay amount selector (103) selecting a signal route where the delay amount is a sum of the first delay amount and the second delay amount when the delay amount exceeds a maximum delay amount available from the first delay amount section (101). The delay amount from when a signal is inputted to when the signal is outputted can be set in a wide range, while suppressing the circuit scale.</p>
申请公布号 DE602008003508(D1) 申请公布日期 2010.12.30
申请号 DE20086003508T 申请日期 2008.08.28
申请人 FUJITSU LTD. 发明人 YAMAZAKI, MANABU
分类号 G11C7/10;G06F12/00;G06F13/42;G11C7/22;G11C11/401;G11C11/407;G11C11/4076;H03K5/135 主分类号 G11C7/10
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