发明名称 TECHNIQUE FOR DETERMINING IF A LOGICAL SUM OF A FIRST OPERAND AND A SECOND OPERAND IS THE SAME AS A THIRD OPERAND
摘要 A system is used to determine if a sum of a first operand and a second operand is the same as a third operand wherein a comparison to the third operand is of variable length. This is particularly useful in a content addressable memory (CAM) where the likelihood of hit is commonly improved over a set associative cache and allows for the CAM to identify different things. For example, an entry can be one length to identify a page of a memory and another entry be a different length to identify a page of memory. This is better understood by reference to the following description and the drawings.
申请公布号 US2010306302(A1) 申请公布日期 2010.12.02
申请号 US20090474451 申请日期 2009.05.29
申请人 发明人 RAMARAJU RAVINDRARAJ;BEARDEN DAVID R.;BRUCE KLAS M.;SNYDER MICHAEL D.
分类号 G06F7/50;G06F12/00;G06F12/02 主分类号 G06F7/50
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