发明名称 DATA CACHE WITH MODIFIED BIT ARRAY
摘要 A microprocessor includes first and second functional units and a data cache having a data array having a write port, a modified bit array having a read port and a write port, and a tag array having a read port, each array having the corresponding predetermined organization. The first functional unit writes data to a cache line of the data array. The first functional unit sets a modified bit in the modified bit array to indicate that the corresponding cache line in the data array has been modified. The second functional unit reads the modified bit from the modified bit array to determine whether or not the cache line has been modified. The second functional unit reads a partial status of the corresponding cache line from the tag array. The partial status does not indicate whether the cache line has been modified. The tag array does not include a port by which the first functional unit may update the partial status of the corresponding cache line.
申请公布号 US2010306478(A1) 申请公布日期 2010.12.02
申请号 US20090472766 申请日期 2009.05.27
申请人 VIA TECHNOLOGIES, INC. 发明人 HOOKER RODNEY E.;EDDY COLIN;HENRY G. GLENN
分类号 G06F12/08;G06F12/00 主分类号 G06F12/08
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