发明名称 MULTI-THREAD PROCESSOR, COMPILER DEVICE AND OPERATING SYSTEM DEVICE
摘要 <p>A multi-thread processor (1) which executes instructions in multiple threads in parallel is provided with a computing unit group (119) comprising multiple computing units each for executing an instruction, a first instruction grouping unit (108) to a third instruction grouping unit (110) each for, in each thread, grouping instructions included in the thread into a group comprising instructions concurrently executable by the multiple computing units, a thread selection unit (114) for selecting, from among the multiple threads, a thread including instructions to be issued to the multiple computing units at every execution cycle of the multi-thread processor (1) by controlling the frequency of execution of the instructions in the multiple threads, and an instruction issuance control unit (115) for issuing the instructions of the grouped group among instructions included in the thread selected by the thread selection unit (114) to the multiple computing units at every execution cycle of the multi-thread processor (1).</p>
申请公布号 WO2010137220(A1) 申请公布日期 2010.12.02
申请号 WO2010JP01931 申请日期 2010.03.18
申请人 PANASONIC CORPORATION;KOGA, YOSHIHIRO;HEISHI, TAKETO 发明人 KOGA, YOSHIHIRO;HEISHI, TAKETO
分类号 G06F9/38;G06F9/46 主分类号 G06F9/38
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