| 发明名称 |
NESTED AND ISOLATED TRANSISTORS WITH REDUCED IMPEDANCE DIFFERENCE |
| 摘要 |
A processing layer, such as silicon, is formed on a metal silicide contact followed by a metal layer. The silicon and metal layers are annealed to increase the thickness of the metal silicide contact. By selectively increasing the thickness of silicide contacts, Rs of transistors in iso and nested regions can be matched.
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| 申请公布号 |
US2010301424(A1) |
申请公布日期 |
2010.12.02 |
| 申请号 |
US20100848999 |
申请日期 |
2010.08.02 |
| 申请人 |
GLOBALFOUNDRIES SINGAPORE PTE. LTD. |
发明人 |
WIDODO JOHNNY;HSIA LIANG CHOO;LEE JAMES YONG MENG;GAO WEN ZHI;LUN ZHAO;LIU HUANG;LAI CHUNG WOH;MISHRA SHAILENDRA;CHOW YEW TUCK;CHEN FANG;ONG SHIANG YANG |
| 分类号 |
H01L29/78 |
主分类号 |
H01L29/78 |
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