| 摘要 |
To provide main I/O lines(MIOX) arranged along an X direction; a plurality of I/O nodes(ND) arranged along the X direction; an amplifier circuit area(AMPA) including a plurality of amplifier circuits(AMP); a plurality of main I/O lines(MIOY) arranged along a Y direction, which respectively connect each of the main I/O lines(MIOX) and each of the corresponding I/O nodes(ND). Among the main I/O lines(MIOY) allocated to the amplifier circuits different from one another, that having a longer wire length is connected more closely to a center of the corresponding main I/O line(MIOX); and that having a shorter wire length is connected more closely to an end of the corresponding main I/O line(MIOX). Accordingly, the difference in wire length for each signal route becomes smaller, and also the wire length of the longest wire route is reduced.
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