发明名称 Event memory assisted synchronization in multi-GPU graphics subsystem
摘要 A method and system are disclosed for synchronizing graphics processing events in a multi-GPU computer system. A master GPU renders a first image into a first portion of a master buffer associated with a display interface, and then writes a first predetermined value corresponding to the first image in a first memory unit. A slave GPU renders a second image into a slave buffer, and then transfers the second image to a second portion of the master buffer, and writes a second predetermined value corresponding to the second image in the first memory unit. The first and second predetermined values represent a queuing sequence of the rendered images. The master GPU flips the first image to display only after examining the first predetermined value in the first memory unit, and flips the second image to display only after examining the second predetermined value in the first memory unit.
申请公布号 US7812849(B2) 申请公布日期 2010.10.12
申请号 US20060582020 申请日期 2006.10.17
申请人 VIA TECHNOLOGIES, INC. 发明人 ZHANG GUOFENG;ZHAO XUAN
分类号 G09G5/399;G06F15/16;G09G5/36;G09G5/397 主分类号 G09G5/399
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