METHOD, APPARATUS, AND SYSTEM OF PARALLEL TEST FOR INTEGRATED CIRCUIT

摘要

PROBLEM TO BE SOLVED: To provide a method, an apparatus, and a system of testing an integrated circuit for reducing test costs, shortening time up to commercialization, and lowering the rate of errors in which defective devices pass as acceptable devices.

SOLUTION: In this apparatus, a plurality of devices under test (DUT) and a plurality of comparators are provided on a common substrate. The plurality of DUTs all operate by the same input stimuli to generate an execution result, respectively. The execution results are compared with each other by a comparator to generate comparative features. A defective device under test is detected based on the features.

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