发明名称 VERIFICATION SUPPORT PROGRAM AND VERIFICATION SUPPORT DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To improve verification accuracy and to reduce a verification period by deciding whether or not an input pattern created by a designer (or a verifier) can verify a metastable state. <P>SOLUTION: The verification support device 600 includes: a detection unit 601 for detecting a change of data delivered to a reception flip-flop in a reception clock domain from a transmission flip-flop in a transmission clock domain of a circuit to be verified, and input to a combination circuit in the reception clock domain;and a determination unit 602 for determining whether or not the change of the data detected by the detection unit 601 is propagated to output of the combination circuit in the reception clock domain according to the input data of the combination circuit, to output the result. <P>COPYRIGHT: (C)2010,JPO&INPIT</p>
申请公布号 JP2010176486(A) 申请公布日期 2010.08.12
申请号 JP20090019651 申请日期 2009.01.30
申请人 FUJITSU LTD 发明人 IWASHITA HIROAKI
分类号 G06F17/50 主分类号 G06F17/50
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