| 摘要 |
<p>According to one embodiment, a high speed serializer (100) for multiplexing 2 N data input (D00, D10, D01, D11), N being a positive integer, comprises one less than 2N multiplexing cells (130a, 130b, 130c) arranged in N stages (110,120). The stages are numbered 1 through N, and the output of the N* stage is a serial transmission (Y) and the inputs of the 1st stage are the 2N data inputs. (D00.D01.D10,D11). Each stage comprises half as many multiplexing cells as the preceding stage. Additionally each multiplexing cell comprises a multiplexer (130a, 130b, 130c) that comprises a pair of inputs and an output. 2N-2 of the multiplexing cells in the first stage further comprise a latch (140) and the output of the latch is coupled to an input of the multiplexer (130c).</p> |
