发明名称 METHOD OF FORMING INTERCONNECTION
摘要 PROBLEM TO BE SOLVED: To provide a method of forming an interconnection, which has large degrees of freedom in processing. SOLUTION: The method of forming the interconnection includes the steps of: forming an insulation layer 31 on an interconnection layer 25; forming a first mask layer 32 and a second mask layer 33 on the insulating layer 31; forming a resist layer 42 on the second mask layer 33; patterning the resist layer 42; patterning the second mask layer 33 with the resist layer 42 as a mask; etching the first mask layer 32, halfway with the resist layer 42 and the second mask layer 33 as a mask; removing the resist layer 42; etching the remaining portion of the first mask layer 32, with the second mask layer 33 as a mask to pattern the first mask layer 32; etching the insulating layer 31, with the patterned first mask layer 32 as a mask to form an interconnecting groove 36; and forming an embedded interconnection layer 38 which is to be connected to the interconnection layer 25, by embedding a conductive substance 37 in the interconnecting groove 36. COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2010161166(A) 申请公布日期 2010.07.22
申请号 JP20090001841 申请日期 2009.01.07
申请人 FUJITSU SEMICONDUCTOR LTD 发明人 IBA YOSHIHISA
分类号 H01L21/768 主分类号 H01L21/768
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