发明名称 |
Address translator and address translation method |
摘要 |
An address translator capable of reducing system loads in address translation and an overhead in switching between operating systems. A plurality of address translation buffers classifies and stores virtual addresses and real addresses based on a plurality of operating systems which is run by a processor. For example, the address translation buffers store the virtual addresses and the real addresses in correspondence with the operating systems. According to a running operating system, an address translation controller accesses a corresponding address translation buffer to translate virtual addresses to real addresses.
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申请公布号 |
US7761686(B2) |
申请公布日期 |
2010.07.20 |
申请号 |
US20040972429 |
申请日期 |
2004.10.26 |
申请人 |
FUJITSU SEMICONDUCTOR LIMITED |
发明人 |
TAKAHASHI SEIGO;IKE ATSUSHI |
分类号 |
G06F12/00;G06F12/10;G06F9/46;G06F12/08 |
主分类号 |
G06F12/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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