| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a latching comparator, along with a demodulation circuit of multi-value logic for correcting off-set using the same, capable of correcting off-set without reducing margin in a manufacturing process. Ž<P>SOLUTION: The latching comparator includes a flip-flop comprising two CMOS inverters which are cross-coupled. A resistor and a constant current source whose set current is variable are connected between respective sources of four transistors of the flip-flop and a power supply/ground, through a transmission transistor. A differential output of the flip-flop is connected to a differential input through respective transmission transistors. A gate of all transmission transistors is connected to any one of differential clock inputs. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
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