发明名称 METHOD FOR FABRICATING AN INTEGRATED CIRCUIT
摘要 A method for fabricating an integrated circuit is provided. A substrate having thereon a first conductive wire and a second conductive wire is provided. A liner is formed on the first conductive wire and second conductive wire. An ashable material layer is filled into a gap between the first conductive wire and second conductive wire. The ashable material layer is then polished to expose a portion of the liner. A cap layer is formed on the ashable material layer and on the exposed liner. A through hole is etched into the cap layer to expose a portion of the ashable material layer. Thereafter, the ashable material layer is removed by way of the through hole.
申请公布号 US2010055898(A1) 申请公布日期 2010.03.04
申请号 US20080246451 申请日期 2008.10.06
申请人 CHANG SHUO-CHE;KUO CHI-HSIANG 发明人 CHANG SHUO-CHE;KUO CHI-HSIANG
分类号 H01L21/44 主分类号 H01L21/44
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