发明名称 D/A converter circuit and digital input class-D amplifier
摘要 <p>The present invention provides a D/A converter circuit which enables D/A conversion with a high precision and can prevent occurrence of a limit cycle component in the case where an input signal is low, and can also prevent the effect of dither signal from occurring in an analog signal which is a D/A conversion result. A dither signal generation section 505 outputs a dither signal (DITHER) which is an alternating current signal and a reversal dither signal (DITHER_N) inverted from the dither signal. A DEM decoder 502 processes an input digital signal including a component of the dither signal (DITHER), and outputs a plurality of lines of time-series digital signals having a density of "1" or "0" conforming to the input digital signal to be processed. An analog addition section 503 converts a plurality of lines of time-series digital signals and the reversal dither signal (DITHER_N) into an analog signal respectively and adds them, and outputs an analog signal which is a D/A conversion result.</p>
申请公布号 EP2159918(A2) 申请公布日期 2010.03.03
申请号 EP20090010822 申请日期 2009.08.24
申请人 YAMAHA CORPORATION 发明人 KAWAI, HIROTAKA;TSUJI, NOBUAKI;MORISHIMA, MORITO;OTANI, YOHEI
分类号 H03M1/06;G06F1/025;H03F3/217;H03M1/82;H03M3/04;H03M7/00 主分类号 H03M1/06
代理机构 代理人
主权项
地址