发明名称 Methods of fabricating semiconductor devices having a double metal salicide layer
摘要 A semiconductor device is fabricated by forming a gate electrode structure, comprising a gate oxide layer pattern, a polysilicon layer pattern, and sidewall spacers on a silicon substrate, forming source/drain regions on both sides of the gate electrode structure in the silicon substrate, depositing a physical vapor deposition (PVD) cobalt layer on the gate electrode structure using PVD, depositing a chemical vapor deposition (CVD) cobalt layer on the PVD cobalt layer using CVD, annealing the silicon substrate to react the PVD and CVD cobalt layers with polysilicon on an upper surface of the gate electrode structure, stripping at least a portion of the PVD cobalt layer and the CVD cobalt layer that has not reacted, and annealing the silicon substrate after stripping the at least the portion of the PVD cobalt layer and the CVD cobalt layer.
申请公布号 US7666786(B2) 申请公布日期 2010.02.23
申请号 US20070756903 申请日期 2007.06.01
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 YUN JONG-HO;CHOI GIL-HEYUN;CHEONG SEONG-HWEE;JUNG SUG-WOO;KIM HYUN-SU;SOHN WOONG-HEE
分类号 H01L21/24;H01L21/44;H01L21/3205;H01L21/4763 主分类号 H01L21/24
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