| 摘要 |
A solid-state imaging device includes a plurality of pixel units, a reference voltage generator circuit, a cancellation unit, an analog-to-digital converter unit, a latch circuit, and a video processing unit. The plurality of pixel units output a reset signal serving as a first reference level of a video signal and the video signal, the video signal being output in units of two or more of the pixel units simultaneously to two or more of the signal lines. The reference voltage generator circuit generates a clamp voltage. The cancellation unit calculates the difference between a first addition and a second addition. The analog-to-digital converter unit digitizes the subtraction result. A latch circuit latches the result obtained at the analog-to-digital converter unit. The video processing unit terminates and starts the signal process in units of the pixel unit in a period when the clamp voltage is not generated.
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