发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor memory device which accurately determines quality of a memory cell. SOLUTION: The semiconductor memory device is provided with a first memory array for programming positive data, and a second memory array for programming reverse data. The semiconductor memory device includes: a column address decoder 22 selecting the first memory cell for determination included in the first memory array and the second memory cell included in the second memory array and paired with the first memory cell; a pre-charge generating circuit 32 generating a pre-charge signal for programming the first memory cell and the second memory cell at a timing corresponding to a first phase of a clock signal, in response to the clock signal; and an enable generating circuit 34 generating an enable signal at a timing corresponding to a second phase different from the first phase of the clock signal, in response to the clock signal. The semiconductor memory device determines outputs of the first memory cell and the second memory cell in accordance with the enable signal. COPYRIGHT: (C)2010,JPO&INPIT
申请公布号 JP2010027155(A) 申请公布日期 2010.02.04
申请号 JP20080188221 申请日期 2008.07.22
申请人 SANYO ELECTRIC CO LTD;SANYO SEMICONDUCTOR CO LTD 发明人 ISHIDA KOJI
分类号 G11C29/12;G11C16/02;G11C16/04 主分类号 G11C29/12
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