发明名称 I/O translation lookaside buffer performance
摘要 Methods and apparatus to provide improved input/output (I/O) address translation lookaside buffer performance are described. In one embodiment, one or more entries of a cache (e.g., an I/O address translation lookaside buffer) are locked in response to a request to lock the one or more entries. Other embodiments are also described.
申请公布号 US7636832(B2) 申请公布日期 2009.12.22
申请号 US20060588900 申请日期 2006.10.26
申请人 INTEL CORPORATION 发明人 RAJ ASHOK;SHAH RAJESH
分类号 G06F12/10 主分类号 G06F12/10
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