发明名称 USING HARDWARE SUPPORT TO REDUCE SYNCHRONIZATION COSTS IN MULTITHREADED APPLICATIONS
摘要 A processor configured to synchronize threads in multithreaded applications. The processor includes first and second registers. The processor stores a first bitmask in the first register and a second bitmask in the second register. For each bitmask, each bit corresponds with one of multiple threads. A given bit in the first bitmask indicates the corresponding thread has been assigned to execute a portion of a unit of work. A corresponding bit in the second bitmask indicates the corresponding thread has completed execution of its assigned portion of the unit of work. The processor receives updates to the second bitmask in the second register and provides an indication that the unit of work has been completed in response to detecting that for each bit in the first bitmask that corresponds to a thread that is assigned work, a corresponding bit in the second bitmask indicates its corresponding thread has completed its assigned work.
申请公布号 US2009300643(A1) 申请公布日期 2009.12.03
申请号 US20080127509 申请日期 2008.05.27
申请人 GOVE DARRYL J 发明人 GOVE DARRYL J.
分类号 G06F9/46 主分类号 G06F9/46
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