发明名称 MEMORY AND METHOD OF EVALUATING A MEMORY STATE OF A RESISTIVE MEMORY CELL
摘要 An integrated circuit comprises a first signal line, a second signal line and a resistive memory cell. The resistive memory cell is actively connectable to the first signal line. The integrated circuit further comprises a coupling device configured to generate a difference of potential between the first and second signal line when the resistive memory cell is actively connected to the first signal line.
申请公布号 US2009257264(A1) 申请公布日期 2009.10.15
申请号 US20080101612 申请日期 2008.04.11
申请人 HOENIGSCHMID HEINZ 发明人 HOENIGSCHMID HEINZ
分类号 G11C11/00;G11C11/24 主分类号 G11C11/00
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