发明名称 Wiring model library constructing device and constructing method, and layout parameter extracting device and extracting method
摘要 A wiring model library constructing method includes: obtaining a correction value of wiring widths on the basis of a plurality of first wiring area ratios and a first wiring film thickness of a plurality of first subject wirings in a plurality of first test wiring patterns each having the first subject wiring and a plurality of first peripheral wrings and being different in the wiring width and wiring interval from each other, obtaining a relationship between the wiring film thickness and the corrected wiring area ratio on the basis of a plurality of second wiring area ratios corrected with the correction value and a second wiring film thickness of a plurality of second subject wirings in a plurality of patterns including at least one of a plurality of inner patterns in each of a plurality of second test wiring patterns including the plurality of first inner patterns each having the second subject wiring and a plurality of second peripheral wirings and being different in the wiring width and wiring interval from each other, and storing data indicative of a relationship of the correction value, the wiring thickness, and the corrected wiring area ratio in association with the wiring width in a storage unit.
申请公布号 US2009228854(A1) 申请公布日期 2009.09.10
申请号 US20090379765 申请日期 2009.02.27
申请人 NEC ELECTRONICS CORPORATION 发明人 SAKAMOTO HIDEO
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
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