发明名称 FABRICATION METHOD OF SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a fabrication method of a semiconductor device by which abnormal growth of silicide on a source/drain can be suppressed and shallow junction of the source/drain can be maintained. SOLUTION: The fabrication method of the semiconductor device includes: forming a gate insulating film 104 and a gate electrode 105a on an N-type well 103a; forming a first source/drain region 111c by implanting a first element in regions of the N-type well 103a on both sides of the gate electrode 105a, the first element being larger than silicon and exhibiting P-type conductivity; forming a second source/drain region 111d by implanting a second element in the regions of the N-type well 103a on both sides of the gate electrode 105a, the second element being smaller than silicon and exhibiting P-type conductivity; and forming a metal silicide layer 112 on the source/drain region 111a. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009182089(A) 申请公布日期 2009.08.13
申请号 JP20080018856 申请日期 2008.01.30
申请人 PANASONIC CORP 发明人 KAMATA YASUYUKI
分类号 H01L21/336;H01L21/28;H01L29/417;H01L29/78 主分类号 H01L21/336
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