发明名称 JUNCTION FET
摘要 PROBLEM TO BE SOLVED: To solve the problems of a conventional junction FET that a channel region surrounded by an insulation region is a single continuous region so that desired mutual conductance gm is obtained around a gate region and that if an impurity concentration with sufficient pinch-off when turned OFF is selected, a pn junction withstand voltage between the channel region and a p-type semiconductor layer is too high to release electrostatic energy, resulting in breakage of an element region before the pn junction breaks down. SOLUTION: A gate region is provided in a first n-type impurity region, and a source region and a drain region are respectively provided in a second n-type impurity region. Impurity concentrations of the first and second n-type impurity regions can be independently selected. Thus, the impurity concentrations can be independently controlled to obtain the desired mutual conductance gm and desired electrostatic withstand voltage can be obtained without influencing each other. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009158594(A) 申请公布日期 2009.07.16
申请号 JP20070332736 申请日期 2007.12.25
申请人 SANYO ELECTRIC CO LTD;SANYO SEMICONDUCTOR CO LTD 发明人 IKEDA YOICHI
分类号 H01L21/337;H01L29/808 主分类号 H01L21/337
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